Perhaps not everyone knows that almost every smartphone used today uses technology from ARM. For Android operating systems, socs such as Snapdragon, Mediatek, and Unisoc use ARMv8. It seems that this architecture will soon retire.
ARM has just introduced a new architecture called ARMv9. In this architecture, ARM wants all applications that still exist at 32 bits to end. ARM plans to run at 64 bits in total by 2023. A processor they release eliminates support for 32-bit instructions.
The first processor introduced was cortex X2 which has the highest performance. This successor to cortex X1 will have 16% better performance if it is on the same clock. It is this processor that no longer supports 32-bit instructions on ARM. For AI performance, this processor even has a 2x increase compared to the X1.
Cortex X2 uses Out Order execution with ten pipeline stages. It also supports SVE-2 (Scalable Vector Extension 2), a new Single Instruction Multiple Data (SIMD) instruction set used as an extension for 64-bit architectures to enable the processing of vast amounts of data. ARM also increased the L3 cache to 16 MB on Cortex X2.
The performance of Cortex X2 also turned out to be very strong. They claim that the single-thread performance is 40% better when compared to the Intel Core i5-1135G7. The new DSU-110 (DynamIQ Shared Unit) allows Cortex-X2 to be used for up to 8 cores in an SoC. Of course, it is for the use of a laptop or server and not for smartphones.
The following processor is the successor of Cortex A78, cortex A710. Cortex-A710 performs 10% faster than the A78 of the same frequency but has 30% more efficient efficiency and 2x AI. Unlike Cortex X2, cortex A710 still supports 32-bit instructions. Cortex A710 will likely be the last because, in 2023, ARM will run at 64 bit.
Lastly, the processor that has the most power consumption, the successor of Cortex A55. The processor that has always been in this LITTLE cluster will be replaced with Cortex A510. Arm says Cortex-A510 delivers 35% performance improvement, 20% efficiency, and 3x AI enhancement compared to Cortex-A55 in the same process. The instructions used are also still In-Order as in Cortex A55.
The design of cortex A510 also gets an update from ARM. ARM introduces a merged-core design or processor core combined with cortex A51. This is comparable to what AMD does with CMT (Clustered Multithreading) on Bulldozer processors, although it is quite different in implementation. Two processor cores will be incorporated into one complex, and one LITTLE cluster could consist of several complexes.
Each processor core will have its L1 cache. However, later on, a complex will share L2 between processors. Cortex A510 itself is also made like Cortex X2, where it no longer supports 32-bit instructions.